//--------------------------------------------------------------------------------------------------
//
//  @ CopyRight Roberti & Parau Enterprises, Inc.  2021-2023
//
//  This work is licensed under the Creative Commons Attribution 4.0 International License.
//  To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/
//   or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA.
//
//--------------------------------------------------------------------------------------------------
//
//  This code sort a vector of 64 bits addresses, each pointing to a null terminated string
//  The sort is in ascending order, and is done  using macro HEAPSORT from the standard
//  DaVinci assembler RISC-V module.
//  It can be called as a function by C code generated by the GNU compiler
//  or any GNU compatible compiler
//
//  The code is divided into two sections:
//
//  1.  The macro that carries out all string comparisons
//
//  2.  The SECTION that use macro HEAPSORT to actually sort the vector 
//
//--------------------------------------------------------------------------------------------------
//
//  If this is the first time you view a Da Vinci Assembler listing, here are some tips
//
//  -   As you move the cursor around, if you see the color under the cursor changing, click
//      on it and additional data will be shown
//
//  -   If at the beginning of a line you see [+] click on it and it will expand in multiple
//      lines.  If you do this on a macro it will expand the macro generated code
//      You could get the same result by right clicking on the line.
//
//--------------------------------------------------------------------------------------------------
//
//  Define the comparison macro that is used by the HEAPSORT macro
//  This is a specialize STRING.COMP to optimize brnaching
//
#MACRO
//MACRO     CompStr     R1, R2, EqualFlag{boolean}, BranchLabel, WReg[4-32]

    var addr1= WReg[0];
    var addr2= WReg[1];
    var wreg0= WReg[2];
    var wreg1= WReg[3];

\#Label     MV          #addr1, #R1                         // Copy string 1 address
\           MV          #addr2, #R2                         // Copy string 2 address
\           WHILE                                           // Start DO block
\               LBU         #wreg0, 0[#addr1]               // Load first string byte
\               LBU         #wreg1, 0[#addr2]               // Load second string byte

\               IF      (#wreg0 < #wreg1), GOTO, ID= #BranchLabel // Done less than
\               IF      (#wreg0 > #wreg1), BREAK            // Done if greater than

    if (EqualFlag)
\               IF      ( #wreg1 == 0 ), GOTO, ID= #BranchLabel // Equal condition with equal flag
    else
\               IF      ( #wreg1 == 0 ), BREAK              // Done - equal strings

\               ADDI    #addr1, 1                           // Get next char address (string 1)
\               ADDI    #addr2, 1                           // Get next char address (string 2)
\               ENDWHILE
#END
//
//  Actual code starts here
//
            SETENV      "RISCV", "RV64I:a,c,d,m,n,zicsr,zifencei", "LP64D", "linux"
                                                            // Define the srchitecture
            BaseDef                                         // Include standard definitions
//
Code        TextSect                                        // Start .text section
            C.SUSPEND                                       // Do not use two byte opCode extension
//
dvasmsortstring                                             /> Entry label
            ENTRY       Stack=!""                           // Leaf entry, only A* and T* registers 
                                                            // are used.  No need to use a stack 
                                                            // or save/restore registers
            HEAPSORT    a0, a1, 64, CompStr, [t0-6, a2-7]   // Invoke HEAPSORT
Exit        EXIT                                            // Return to caller
//
            END