//MACRO     Avl.locpostnext	Node,   NullLbl,    WReg,	FieldDispl= 0
//--------------------------------------------------------------------------------------------------
//
//  @ CopyRight Roberti & Parau Enterprises, Inc.  2021-2023
//
//  This work is licensed under the Creative Commons Attribution-NoDerivatives 4.0 International License.
//  To view a copy of this license, visit http://creativecommons.org/licenses/by-nd/4.0/
//   or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA.
//
//--------------------------------------------------------------------------------------------------
//
    //
    //  Get load/store MIs and word length
    //
    eval(DVASM.getEnv()[4]);
    var ld= "L" + abiWID;
    var st= "S" + abiWID;
    var wl= abiWLen;
    
    var leftField= FieldDispl;
    var parentField= wl + "+" + FieldDispl;
    var rightField= wl*2 + "+" + FieldDispl;
    
    var	done= DVASM.getNewLabel();
    
    //
    //  Generate code
    //
\#Label   	#ld         #WREg, #rightField[#Node]         	// Get right child
\           IF          ( #WREg != 0 ), GOTO, ID= #done		// Right child is the next post-order node
\           #ld         #WREg, #leftField[#Node]          	// Get left child
\           IF          ( #WREg != 0 ), GOTO, ID= #done		// Left child is the next pre-order node
\           DO                                              // Search for parent of left subtree
\              	#ld         #WREg, #parentField [#Node]        	// Load parent addr
\              	ANDI        #Node, ~ 0b111 [#WREg]             	// Mask out balance and link bits
\              	IF          ( #Node == 0), GOTO, ID= #NullLbl  	// Done - current node is root
\              	ANDI        #WREg, 0b100 [#WREg]              	// Extract link type
\              	IF          ( #WREg != 0 ), CONTINUE           	// Skip this parent if left child of parent up
\              	#ld         #WREg, #leftField[#Node]          	// Load left child addr
\				IF			( #WREg == 0 ), CONTINUE			// No left child - try next parent up
\              	ENDDO 
\#done		MV			#Node, #WREg						// Copy node to correct register