//MACRO BaseDef //-------------------------------------------------------------------------------------------------- // // @ CopyRight Roberti & Parau Enterprises, Inc. 2021-2023 // // This work is licensed under the Creative Commons Attribution-NoDerivatives 4.0 International License. // To view a copy of this license, visit http://creativecommons.org/licenses/by-nd/4.0/ // or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA. // //-------------------------------------------------------------------------------------------------- // if (Label != "") DVASM.putInfo("Label [" + Label + "] specified - it will be ignored"); \ FrameWorkDef // Include DVASM framework base definitions // // Get number of registers // eval(DVASM.getEnv()[4]); // // Basic register definition // \// \// Base register definitions "R" prefix \// for (var i= 0; i < abiNoRegs; i++) \r#i EQU #i \// \// Base register definitions "X" prefix \// for (var i= 0; i < abiNoRegs; i++) \x#i EQU #i // // Alternate register definitions // \// \// Alternate ABI register definitions \// \ra EQU 1 \sp EQU 2 \gp EQU 3 \tp EQU 4 \t0 EQU 5 \t1 EQU 6 \t2 EQU 7 \s0 EQU 8 \s1 EQU 9 for (var i= 10; i < 16; i++) { var a= "a" + (i-10) \#a EQU #i } if (abiNoRegs > 16) { for (var i= 16; i < 18; i++) { var a= "a" + (i-10) \#a EQU #i } for (var i= 18; i < 28; i++) { var s= "s" + (i-16) \#s EQU #i } \t3 EQU 28 \t4 EQU 29 \t5 EQU 30 \t6 EQU 31 } // // Define floating registers if used // if (abiNoFRegs > 0) { \// \// Floating register definitions \// for (var i= 0; i < 32; i++) \f#i EQU #i \// \// Alternate ABI floating register definitions \// for (var i= 0; i < 8; i++) { var fa= "ft" + (i) \#fa EQU #i } \fs0 EQU 8 \fs1 EQU 9 for (var i= 10; i < 18; i++) { var fa= "fa" + (i-10) \#fa EQU #i } for (var i= 18; i < 28; i++) { var fs= "fs" + (i-16) \#fs EQU #i } for (var i= 28; i < 32; i++) { var fs= "ft" + (i-20) \#fs EQU #i } \// \// Define Round Methods for Floating Point Arithmetic \// \rm_rne EQU 0 \rm_rtz EQU 1 \rm_rdn EQU 2 \rm_rup EQU 3 \rm_rmm EQU 4 \rm_dyn EQU 7 } // // Define control registers // \// \// Control registers \// \fflags EQU 0x001 \frm EQU 0x002 \fcsr EQU 0x003 \cycle EQU 0xC00 \time EQU 0xC01 \instret EQU 0xC02 \cycleh EQU 0xC80 \timeh EQU 0xC81 \instreth EQU 0xC82